A conventional computer generally implements information processing and storage functionalities in binary logic. The processing (or computing) and storage of information are carried out separately in different devices or functional modules. The computing process is usually a serial process having steps executed one by one.
It is possible to improve efficiency by emulating a neural network of a brain when implementing information computation and storage functions. This has become an importance trend for information science development in the future. Such processing functionality like neural network should be based on the devices and circuits like neuron, including memorizing, switching, adaptive learning, advanced computing, etc.
A conventional neural network integrated circuit includes an array of a plurality of neurons, and each of the neurons includes at least one input line (corresponding to at least one synapse and dendrite), one operational amplifier (corresponding to one neurocyte), and one output line (corresponding to one neuraxon). Signals are inputted via the at least one input line and weighted, summed in the operational amplifier, and outputted via the output line if the sum of the signals exceeds a preset value. The input line includes a fixed or variable resistor as the weighting section. As an example, U.S. Pat. No. 5,422,982 discloses a neural network in which a variable resistor formed by SiO2 film acts as synapse of a neuron, and U.S. Pat. No. 5,296,835 discloses a neural network in which a variable resistor formed by sulfide is used as a weighting section.
For the variable-resistor-based neuron disclosed in the above two documents, a resistance value is adjusted by changing an externally-applied voltage, thereby enabling the adaptive learning functionality of the neuron. However, it is difficult to implement the logic operation functionality of the neuron. In the existing neutral networks, the fixed or variable resistor is only a part of the neuron, and plays only the role of weighting section. Each neuron further requires an independent operational amplifier for summing the weighted signals. The independent operational amplifier needs to be composed of intricate circuitries.
The existing neural network has the problem of low speed, high power consumption and low integration level, due to the requirement for an independent variable resistor (as weighting section) and an independent operational amplifier.
It is thus desirable for a neural network with higher speed, lower operating voltage and current, and excellent scalability. There is a need for a neuron device capable of simplifying device structure, increasing the integration level and reducing production cost, which is still a challenge in the research topic.